Background / Context / Abstract:

Like SiC, GaN is excellent in high voltage and high temperature operation and also has excellent high frequency characteristics, so it is expected to be applied as a power device for mobile communication base stations. However, at present, GaN-basee MOS power devices with excellent device performance and long-term reliability have not yet been commercialized. One of the reasons for this is the degradation of the interfacial characteristics of the insulator/GaN structure. In addition, with the recent development of freestanding GaN substrate fabrication technology, the application of vertical GaN MOSFETs similar to SiC is being considered, and the realization of high-quality GaN MOS interfaces is a common issue for these devices as well.
The inventors have been investigating the relationship between the interface structure and the electrical characteristics of MOS devices through structural analysis of the insulator/GaN substrate interface and evaluation of the interface reaction. This invention is the result of research conducted under the Strategic Innovation Program (SIP: 2014-2018) “Next Generation Power Electronics” based on these findings, and the research and development is still ongoing as a MEXT project.

Technology Overview:

A method for fabricating high-quality gallium nitride (GaN) devices featuring a MOS structure with a thin GaOx layer at the interface between a GaN substrate and an insulating film. Although SiO2 and other deposited insulating films are expected to be used in GaN MOS devices, the said method is not limited to SiO2 insulating films.
First, in the fabrication of the insulating film/GaOx/GaN structure, the GaOx interlayer can be formed on the GaN surface beforehand and then the appropriate insulating film can be deposited, or the insulating film can be deposited directly on the GaN and then heat-treated to grow the GaOx interlayer. Furthermore, by setting the initial conditions for the insulating film deposition appropriately, the GaOx interlayer may be spontaneously inserted by oxidation of the GaN surface in the initial stage of deposition. The GaN MOS device obtained in this way has excellent interfacial electrical properties and is expected to be used for the following applications with excellent device power conversion efficiency and reliability.
(1) Horizontal MOS-gate high electron mobility transistors (HEMTs)
(2) Normally-Off vertical GaN MOSFETs

Benefits:

Advantages
・Realization of GaN-based MOS power devices with excellent power conversion efficiency and reliability
・Patents issued: JP 6,245,593 (B2); US 10,103,232 (B2)
Data:
– The surface of the freestanding GaN substrate was thermally oxidized at 800°C, 900°C, and 1000°C under an oxygen atmosphere at atmospheric pressure, and AFM observation of the oxide surface layer formed showed that a few nm thick GaOx layer was almost uniformly formed at 800 and 900°C. MOS capacitors were fabricated by depositing a SiO2 insulating film on this surface oxide layer, and when the C-V characteristics were evaluated, it was confirmed that the interface state density of GaN MOS structure was reduced.
– When a SiO2 insulating film is deposited on a free-standing GaN substrate using the plasma CVD method, the GaN surface is exposed to oxygen radicals in the initial stage of deposition, forming a surface oxide layer. As a result, a GaN MOS structure with a GaOx interface layer is automatically formed, and it was confirmed that the MOS interface defects can be reduced as well as the GaOx interlayer formed by prior oxidation of the GaN substrate surface.
Publications:
– T. Yamada et al. and H. Watanabe, “Improved interface properties of GaN-based metal-oxide-semiconductor devices with thin Ga-oxide interlayers.” Appl. Phys. Lett. 110, 261603 (2017). https://doi.org/10.1063/1.4990689
– T. Yamada et al. and H. Watanabe, “Control of Ga-oxide interlayer growth and Ga diffusion in SiO2/GaN stacks for high-quality GaN-based metal-oxide-semiconductor devices with improved gate dielectric reliability.” Appl. Phys. Express 11, 015701 (2018). https://doi.org/10.7567/APEX.11.015701
– T. Yamada et al. and H. Watanabe, “Controlled oxide interlayer for improving reliability of SiO2/GaN MOS devices.” Jpn. J. Appl. Phys. 58, SCCD06 (2018). https://doi.org/10.7567/1347-4065/ab09e0
etc.

Potential Applications / Potential Markets:

High Quality GaN MOS Structure: Reduction of electrical defects at the dielectric interface by inserting a GaOx layer

State of Development / Opportunity / Seeking:

・Available for exclusive and non-exclusive licensing
・Exclusive/non-exclusive evaluation for defined period (set up for options)
・Collaborative/supportive research

※Seeking
1. Development partner
2. Licensing　

IP Status:

JP.6245593.B1
US.10103232.B2

Figures:

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